FFT design and implement based on late-model FPGA
XU Jin-fu
Abstract
XU Jin-fu
Abstract
In the design of FFT based on FPGA,in order to increase FFT processing speed,this paper brings forward a new method that use shift-register to store twiddle-factors,and validate on Stratix series FPGA of Altera company.Experimentation result indicates that this method can improve FFT processing speed of FFT observably than the method of store twiddle-factors with ROM generally,and can satisfy FFT real-time processing request better.
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In the design of FFT based on FPGA,in order to increase FFT processing speed,this paper brings forward a new method that use shift-register to store twiddle-factors,and validate on Stratix series FPGA of Altera company.Experimentation result indicates that this method can improve FFT processing speed of FFT observably than the method of store twiddle-factors with ROM generally,and can satisfy FFT real-time processing request better.
Key concepts: Fast Fourier transform, Stratix, Field-programmable gate array, Twiddle factor, Computer science, Parallel computing, Prime-factor FFT algorithm, Split-radix FFT algorithm