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Implementation of Fast Flourier Transform based on FPGA

Liu Jia

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Abstract

On the basis of analyzing the FFT algorithm, in order to increase the speed of FFT processing, this article adopts a method that uses the shift register to save the twiddle factor, and validate on Cyclone II series FPGA of Altera company, compare with the general method with ROM, reduce the storage time, enhance the speed, and meet the need of FFT processing data better.

About this research paper

What this paper is about

On the basis of analyzing the FFT algorithm, in order to increase the speed of FFT processing, this article adopts a method that uses the shift register to save the twiddle factor, and validate on Cyclone II series FPGA of Altera company, compare with the general method with ROM, reduce the storage time, enhance the speed, and meet the need of FFT processing data better.

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Method / approach

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Available abstract

On the basis of analyzing the FFT algorithm, in order to increase the speed of FFT processing, this article adopts a method that uses the shift register to save the twiddle factor, and validate on Cyclone II series FPGA of Altera company, compare with the general method with ROM, reduce the storage time, enhance the speed, and meet the need of FFT processing data better.

Key concepts: Computer science, Fast Fourier transform, Field-programmable gate array, Twiddle factor, Factor (programming language), Parallel computing, Computer hardware, Embedded system

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