Yu Zongzuo
Abstract
An implemention of CRC parallel algorithm is proposed based on FPGA programmable chip which can process various lengths of data.On a piece of EPF10K10LC84-4 chip,the CRC module is accomplished using VHDL language.The results of experiment proves that the module has good flexibility and generality.
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An implemention of CRC parallel algorithm is proposed based on FPGA programmable chip which can process various lengths of data.On a piece of EPF10K10LC84-4 chip,the CRC module is accomplished using VHDL language.The results of experiment proves that the module has good flexibility and generality.
Key concepts: VHDL, Field-programmable gate array, Cyclic redundancy check, Computer science, Chip, Embedded system, Computer hardware, Redundancy (engineering)