Yu Zongzuo, Guo Ying
Abstract
The design idea is proposed to implement CRC parallel arithmetic based on FPGA programmable chip which can process various-length data. And on a piece of EPF10K10LC84-4 chip, the CRC module is accomplished using VHDL language. The result of experiment proves that the module is with good flexibility and generality.
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The design idea is proposed to implement CRC parallel arithmetic based on FPGA programmable chip which can process various-length data. And on a piece of EPF10K10LC84-4 chip, the CRC module is accomplished using VHDL language. The result of experiment proves that the module is with good flexibility and generality.
Key concepts: VHDL, Field-programmable gate array, Computer science, Cyclic redundancy check, Redundancy (engineering), Generality, Computer architecture, Hardware description language