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VHDL Design and Simulation of Complete Synchronization Digital Frequency Meter

Zhu Xiangping

Abstract

A complete synchronization digital frequency meter is designed by using complete synchronization measurement theory,by FPGA and program project on VHDL at Max+PlusⅡ in this paper.The frequency meter′precision is DC~100 MHz,and ±1 count error is eliminated.The paper gives design method on VHDL and simulation waveform in every module.

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Key concepts: VHDL, Field-programmable gate array, Synchronization (alternating current), Metre, Waveform, Computer science, Electronic engineering, Computer hardware