Designing a simple digital frequency meter based on VHDL
Liang Fang
Abstract
Liang Fang
Abstract
Using the top-down design method of digital system,a variable-rang digital frequency meter is designed based on VHDL and then simulated on Quartus II platform,verified on F10k10M testbox in this paper.The digital frequency meter is relative independent in module design to ensure designing,debugging and modifying every modules independently,which can shorten the design cycle and reduce the design complexity effectively.Simulation analysis results show that the system can meet the design requirements of measurement error less than or equal to 1% and realize the electronic circuit automation process.
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Using the top-down design method of digital system,a variable-rang digital frequency meter is designed based on VHDL and then simulated on Quartus II platform,verified on F10k10M testbox in this paper.The digital frequency meter is relative independent in module design to ensure designing,debugging and modifying every modules independently,which can shorten the design cycle and reduce the design complexity effectively.Simulation analysis results show that the system can meet the design requirements of measurement error less than or equal to 1% and realize the electronic circuit automation process.
Key concepts: VHDL, Debugging, Computer science, Simple (philosophy), Design cycle, Metre, Electronic design automation, Process (computing)