2007Modern Electronics TechniqueRequires access

FPGA Implementation in the Viterbi Decoding Scheme of(2,1,7) Convolutional Code

Shi Lening

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Abstract

Convolutional code are universally used in the norm of mobile communication system.This paper first analyzes the principle of Viterbi algorithm,which is the optimal decoding scheme for convolutional codes.Then the paper also presents the FPGA implementation in the Viterbi decoding scheme of(2,1,7) convolutional code.The method gives the new branch weight algorithm and uniform state weight memories,so it can take advantage of the FPGA.By the design of survival path exchange register module,the power consumption and the RAM size are needed for saving metrics are decreased.

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What this paper is about

Convolutional code are universally used in the norm of mobile communication system.This paper first analyzes the principle of Viterbi algorithm,which is the optimal decoding scheme for convolutional codes.Then the paper also presents the FPGA implementation in the Viterbi decoding scheme of(2,1,7) convolutional code.The method gives the new branch weight algorithm and uniform state weight memories,so it can take advantage of the FPGA.By the design of survival path exchange register module,the power consumption and the RAM size are needed for saving metrics are decreased.

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Available abstract

Convolutional code are universally used in the norm of mobile communication system.This paper first analyzes the principle of Viterbi algorithm,which is the optimal decoding scheme for convolutional codes.Then the paper also presents the FPGA implementation in the Viterbi decoding scheme of(2,1,7) convolutional code.The method gives the new branch weight algorithm and uniform state weight memories,so it can take advantage of the FPGA.By the design of survival path exchange register module,the power consumption and the RAM size are needed for saving metrics are decreased.

Key concepts: Convolutional code, Viterbi decoder, Computer science, Viterbi algorithm, Iterative Viterbi decoding, Field-programmable gate array, Decoding methods, Soft output Viterbi algorithm

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