The Hardware Implementation of Viterbi Decoder of Convolutional Codes
Dalei Wu
Abstract
Dalei Wu
Abstract
Convolutional code and turbo code are universally used in the norm of the third generation mobile communication systems. This paper first expounds the principle of Viterbi algorithm. Then the coding circuit and the Viterbi decoding scheme of(2, l,3)convolutional code which are designed and implemented by single chip are discussed. Combining Viterbi algorithm with inter- leaving scheme, the statistics shows that the error-correcting performance of(2, 1, 3 ) convolutional code is improved greatly.
A significance statement is not available in the OpenAlex record.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
Convolutional code and turbo code are universally used in the norm of the third generation mobile communication systems. This paper first expounds the principle of Viterbi algorithm. Then the coding circuit and the Viterbi decoding scheme of(2, l,3)convolutional code which are designed and implemented by single chip are discussed. Combining Viterbi algorithm with inter- leaving scheme, the statistics shows that the error-correcting performance of(2, 1, 3 ) convolutional code is improved greatly.
Key concepts: Convolutional code, Viterbi decoder, Computer science, Viterbi algorithm, Iterative Viterbi decoding, Turbo code, Soft output Viterbi algorithm, Serial concatenated convolutional codes