2011Electronic Design EngineeringRequires access

Design and synthesis of I~2C controller based on verilog

Yueqiang Chu

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Abstract

Describe the FPGA,I2C,Verilog basic concepts,together these three technologies design the I2C slave controller on FPGA.The controller can receive data from the I2C bus,it first determines whether the received address data match to their own address,If it matched and then analyze the received data,according to data received from the bus to control peripherals.Finally,in the preparation of testbanch in modelsim simulation in I2C bus to send data to the top of the I2C slave controller module sends excitation signals to verify the correctness of the module.The results show that the controller module design is correct and has been designed to achieve the purpose,which you can control the peripheral modules.

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What this paper is about

Describe the FPGA,I2C,Verilog basic concepts,together these three technologies design the I2C slave controller on FPGA.The controller can receive data from the I2C bus,it first determines whether the received address data match to their own address,If it matched and then analyze the received data,according to data received from the bus to control peripherals.Finally,in the preparation of testbanch in modelsim simulation in I2C bus to send data to the top of the I2C slave controller module sends excitation signals to verify the correctness of the module.The results show that the controller module design is correct and has been designed to achieve the purpose,which you can control the peripheral modules.

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Available abstract

Describe the FPGA,I2C,Verilog basic concepts,together these three technologies design the I2C slave controller on FPGA.The controller can receive data from the I2C bus,it first determines whether the received address data match to their own address,If it matched and then analyze the received data,according to data received from the bus to control peripherals.Finally,in the preparation of testbanch in modelsim simulation in I2C bus to send data to the top of the I2C slave controller module sends excitation signals to verify the correctness of the module.The results show that the controller module design is correct and has been designed to achieve the purpose,which you can control the peripheral modules.

Key concepts: ModelSim, Verilog, Field-programmable gate array, Correctness, Computer science, Controller (irrigation), Embedded system, Computer hardware

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