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A Frequency Synthesizer for Single-Chip UHF RFID Reader

Weiping Jing

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Abstract

According to requirements of EPC RFID Class-1 Generation-2 Protocols,a 3-order II-type charge pump phase locked loop(CPPLL) with a 250 kHz reference frequency was proposed,which acted as a frequency synthesizer for single-chip UHF RFID reader.The proposed CPPLL was implemented in MOSIS IBM 0.18 μm RF/MM CMOS technology.Post simulation results showed that the PLL had an output frequency ranging from 760 MHz to 1.12 GHz,and a phase noise of-113.1 dBc/Hz and-120.4 dBc/Hz at 250 kHz and 500 kHz offset,respectively,for 900 MHz operating frequency,while drawing 9.4 mA of current from a 3.3 V power supply.

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What this paper is about

According to requirements of EPC RFID Class-1 Generation-2 Protocols,a 3-order II-type charge pump phase locked loop(CPPLL) with a 250 kHz reference frequency was proposed,which acted as a frequency synthesizer for single-chip UHF RFID reader.The proposed CPPLL was implemented in MOSIS IBM 0.18 μm RF/MM CMOS technology.Post simulation results showed that the PLL had an output frequency ranging from 760 MHz to 1.12 GHz,and a phase noise of-113.1 dBc/Hz and-120.4 dBc/Hz at 250 kHz and 500 kHz offset,respectively,for 900 MHz operating frequency,while drawing 9.4 mA of current from a 3.3 V power supply.

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Available abstract

According to requirements of EPC RFID Class-1 Generation-2 Protocols,a 3-order II-type charge pump phase locked loop(CPPLL) with a 250 kHz reference frequency was proposed,which acted as a frequency synthesizer for single-chip UHF RFID reader.The proposed CPPLL was implemented in MOSIS IBM 0.18 μm RF/MM CMOS technology.Post simulation results showed that the PLL had an output frequency ranging from 760 MHz to 1.12 GHz,and a phase noise of-113.1 dBc/Hz and-120.4 dBc/Hz at 250 kHz and 500 kHz offset,respectively,for 900 MHz operating frequency,while drawing 9.4 mA of current from a 3.3 V power supply.

Key concepts: dBc, Ultra high frequency, Phase noise, Frequency synthesizer, Phase-locked loop, Frequency offset, Electrical engineering, CMOS

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