ScholarLens Back to search
2008•Unpublished venueRequires access

CMOS Implementation of an RF PLL Synthesizer for Use in RFID Systems

Xie Weifu, Yongming Li, Chun Zhang, Zhihua Wang

Open publisher page 2 citations

Abstract

An integrated RF PLL frequency synthesizer for use in RFID systems is presented.It integrates a voltage-controlled oscillator,phase frequency detector,charge pump,high-frequency dual-modulus divider,and digital programmable divider.The frequency synthesizer was implemented in a 0.18μm CMOS process.It uses a 13MHz crystal oscillator as input.The output range is from 860 to 960MHz,the phase margin is -123dBc/1MHz,the frequency step is 200kHz,and the change frequency is within 150μs.

About this research paper

What this paper is about

An integrated RF PLL frequency synthesizer for use in RFID systems is presented.It integrates a voltage-controlled oscillator,phase frequency detector,charge pump,high-frequency dual-modulus divider,and digital programmable divider.The frequency synthesizer was implemented in a 0.18μm CMOS process.It uses a 13MHz crystal oscillator as input.The output range is from 860 to 960MHz,the phase margin is -123dBc/1MHz,the frequency step is 200kHz,and the change frequency is within 150μs.

Why it matters

OpenAlex reports 2 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

An integrated RF PLL frequency synthesizer for use in RFID systems is presented.It integrates a voltage-controlled oscillator,phase frequency detector,charge pump,high-frequency dual-modulus divider,and digital programmable divider.The frequency synthesizer was implemented in a 0.18μm CMOS process.It uses a 13MHz crystal oscillator as input.The output range is from 860 to 960MHz,the phase margin is -123dBc/1MHz,the frequency step is 200kHz,and the change frequency is within 150μs.

Key concepts: Frequency synthesizer, Phase-locked loop, Frequency divider, Voltage-controlled oscillator, Phase frequency detector, Direct digital synthesizer, CMOS, Electronic engineering

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
CMOS Implementation of an RF PLL Synthesizer for Use in RFID Systems — Research Paper | ScholarLens