ScholarLens Back to search
2009•Unpublished venueRequires access

A Low Phase Noise Frequency Synthesizer for Single-Chip UHF RFID Reader

Zongsheng Lai

Open publisher page 0 citations

Abstract

Requirements of frequency synthesizer on phase noise were discussed based on EPC global C1G2 and ETSI multi-protocol operation.A low phase noise 3rd-order II-type charge pump phase locked loop for single-chip CMOS UHF RFID reader was presented,which acted as a frequency synthesizer.Symmetrical LC filters and LDO regulator were used to improve phase noise performance.The circuit was implemented in 0.18 μm CMOS RF technology.Test results showed that the frequency synthesizer had a phase noise of-109.13 dBc/Hz and-127.02 dBc/Hz,at 200 kHz and 1 MHz offset from the carrier,respectively.

About this research paper

What this paper is about

Requirements of frequency synthesizer on phase noise were discussed based on EPC global C1G2 and ETSI multi-protocol operation.A low phase noise 3rd-order II-type charge pump phase locked loop for single-chip CMOS UHF RFID reader was presented,which acted as a frequency synthesizer.Symmetrical LC filters and LDO regulator were used to improve phase noise performance.The circuit was implemented in 0.18 μm CMOS RF technology.Test results showed that the frequency synthesizer had a phase noise of-109.13 dBc/Hz and-127.02 dBc/Hz,at 200 kHz and 1 MHz offset from the carrier,respectively.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Requirements of frequency synthesizer on phase noise were discussed based on EPC global C1G2 and ETSI multi-protocol operation.A low phase noise 3rd-order II-type charge pump phase locked loop for single-chip CMOS UHF RFID reader was presented,which acted as a frequency synthesizer.Symmetrical LC filters and LDO regulator were used to improve phase noise performance.The circuit was implemented in 0.18 μm CMOS RF technology.Test results showed that the frequency synthesizer had a phase noise of-109.13 dBc/Hz and-127.02 dBc/Hz,at 200 kHz and 1 MHz offset from the carrier,respectively.

Key concepts: Phase noise, dBc, Frequency synthesizer, Ultra high frequency, Phase-locked loop, Frequency offset, CMOS, Direct digital synthesizer

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
A Low Phase Noise Frequency Synthesizer for Single-Chip UHF RFID Reader — Research Paper | ScholarLens