2007Coal EngineeringRequires access

Practice on FIR digital filter base on FPGA

Zhang Jian-ying

Open publisher page 0 citations

Abstract

The introduced the FPGA,the method of FPGA applied to DSP with the checking table distributed arithmetic,including the series distributed arithmetic.A 12-tap 8-bit FIR digital filter was made with a FLEX 10 K chip.The filter wave diagram can be made.The results showed that the technical index could be met and the design mission could be completed.

About this research paper

What this paper is about

The introduced the FPGA,the method of FPGA applied to DSP with the checking table distributed arithmetic,including the series distributed arithmetic.A 12-tap 8-bit FIR digital filter was made with a FLEX 10 K chip.The filter wave diagram can be made.The results showed that the technical index could be met and the design mission could be completed.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

The introduced the FPGA,the method of FPGA applied to DSP with the checking table distributed arithmetic,including the series distributed arithmetic.A 12-tap 8-bit FIR digital filter was made with a FLEX 10 K chip.The filter wave diagram can be made.The results showed that the technical index could be met and the design mission could be completed.

Key concepts: Field-programmable gate array, Lookup table, Finite impulse response, Digital signal processing, Filter (signal processing), Digital filter, Computer science, Computer hardware

Related papers

Back to paper searchBrowse research topicsOriginal source
Practice on FIR digital filter base on FPGA — Research Paper | ScholarLens