2012•Unpublished venueRequires access

FPGA Implementation Of Distributed Arithmetic For FIR Filter

M. Keerthi, Vasujadevi Midasala, S Nagakishore Bhavanam, Jeevan Reddy K

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Key concepts: Field-programmable gate array, Finite impulse response, Computer science, Arithmetic, Filter (signal processing), Parallel computing, Computer architecture, Computer hardware

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