MOTIS-An MOS timing simulator

A new circuit simulator is described which combines the gate-to-gate signal propagation technique used in logic simulators with detailed device representation and circuit analysis at the gate level. MOTIS is specialized for analyses of MOS logic circuits during the prelayout and postlayout phases of a design. The device modeling takes account of the back-gate bias effects and the bidirectionality of transmission gates. The simulation mechanism and the detailed device modeling lead to simulation of the dependence of propagation delays on input waveforms. The loading and device capacitances are assumed to be constant and bootstrapping effects are not simulated. The simulator has been implemented on a minicomputer having a 32K-word memory of 16-bit words, a disk module, and a storage CRT/keyboard terminal. This configuration allows simulation of circuits having 1000 gates with an operational speed of approximately 2 ms of real time per gate per nanosecond of circuit time.