A high-transconductance self-aligned GaAs MESFET fabricated by through-AIN implantation
Hidetoshi Onodera, Hiroki Kawata, Naoki Yokoyama, H. Nishi, A. Shibatomi
Abstract
Hidetoshi Onodera, Hiroki Kawata, Naoki Yokoyama, H. Nishi, A. Shibatomi
Abstract
This paper describes a new technique for the fabrication of high-transconductance GaAs MESFET's. Tungsten-silicide gate, self-aligned GaAs MESFET's were fabricated on extremely thin channel layers formed by implantation through AlN layers on semi-insulating GaAs substrates. Transconductance of the through-implanted MESFET's showed 30- to 50-percent increase as compared with that of conventional self-aligned MESFET's and reached its maximum value at 300 mS/mm for 1-µm gate-length FET's. The uniformity of the threshold voltage across a 2-in wafer was also excellent with a standard deviation of 44 mV. Circuit simulation indicates that the advantage of these FET's becomes more crucial when used in a very large-scale integrated circuit (VLSI).
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This paper describes a new technique for the fabrication of high-transconductance GaAs MESFET's. Tungsten-silicide gate, self-aligned GaAs MESFET's were fabricated on extremely thin channel layers formed by implantation through AlN layers on semi-insulating GaAs substrates. Transconductance of the through-implanted MESFET's showed 30- to 50-percent increase as compared with that of conventional self-aligned MESFET's and reached its maximum value at 300 mS/mm for 1-µm gate-length FET's. The uniformity of the threshold voltage across a 2-in wafer was also excellent with a standard deviation of 44 mV. Circuit simulation indicates that the advantage of these FET's becomes more crucial when used in a very large-scale integrated circuit (VLSI).
Key concepts: MESFET, Transconductance, Materials science, Optoelectronics, Wafer, Fabrication, Gallium arsenide, Threshold voltage