SlewFTA: Functional Timing Analysis Considering Slew Propagation

Timing analysis is an essential part of the modern VLSI design flow. When compared to static timing analysis (STA), functional timing analysis (FTA) can not only calculate a critical delay that is closer to the true delay of the circuit, but it can also consider its function to generate an actual input pattern to induce such delay. However, similar to STA, the original FTA always chooses the cell's worst input slew during propagation until it reaches the primary outputs. As a result, this estimate for the final delay may be overly pessimistic. Since not always the worst slews are propagated during critical path derivation in FTA when considering the circuit's Boolean function. As a result, this paper proposes SlewFTA, a novel functional-timing-analysis engine that takes slew propagation into account. To address the slew propagation problem, two techniques (1) binary search and (2) slew shrinking are incorporated into FTA to more realistically model slew propagation. Comparing to FTA, SlewFTA further reduces the final delay by 6.38% on average (10.46% in the best case) on 12 benchmark circuits. SlewFTA is demonstrated to be effective at relaxing timing margins and providing more realistic critical paths for modern VLSI designs.