A Survey of Machine Learning Methods and Applications in Electronic Design Automation

Over the past decades, the domain of electronic circuits design continues transitioning to wider usage of the automation tools to overcome the human level limitations, where integrated circuits (IC) were designed by hand and manually arranged. Experts in the electronic design automation (EDA) industry agree that most of the Application-Specific Integrated Circuit (ASIC) and Field-Programmable Gate Arrays (FPGA) designers will turn to high-level automated design methodologies soon. The main reason for this is the technology improvements that have taken place in the EDA tools, hardware, and software. In the past couple of years, Machine Learning (ML) achievements for EDA turned into a separate field with new studies and methods that enclose all the phases in the chip design flow, such as logic synthesis, design space reduction, exploration, placement, and routing. The latest ML-build approaches have shown considerable improvements in contrast to established traditional methods. This paper covers the newest ML algorithms in FPGA device design, emphasizing the recent research benchmarks’ realizations.