2020•Unpublished venueRequires access

Accelerated-Detection of Regeneration in Swing-Limited Comparators used in Slope ADCs

B. Bhuvan, K. Devadershan, Ajit Pal, Mukul Sarkar

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Abstract

This paper presents an accelerated-detection of regeneration in comparators using limited-output swing regenerative latch. The proposed method increases the operating clock frequency of fixed-current biased comparators without an increase in the static power consumption. The accelerated-detection comparator was fabricated in UMC 180 nm technology. The measurements show that the proposed technique increases the comparator-operating frequency more than twice and reduces the power consumption by 25% compared to similar circuits reported earlier. The comparisons are performed at a maximum clock frequency of 43 MHz while consuming 2.4 μW power from a supply of 1.8 V.

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This paper presents an accelerated-detection of regeneration in comparators using limited-output swing regenerative latch. The proposed method increases the operating clock frequency of fixed-current biased comparators without an increase in the static power consumption. The accelerated-detection comparator was fabricated in UMC 180 nm technology. The measurements show that the proposed technique increases the comparator-operating frequency more than twice and reduces the power consumption by 25% compared to similar circuits reported earlier. The comparisons are performed at a maximum clock frequency of 43 MHz while consuming 2.4 μW power from a supply of 1.8 V.

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Available abstract

This paper presents an accelerated-detection of regeneration in comparators using limited-output swing regenerative latch. The proposed method increases the operating clock frequency of fixed-current biased comparators without an increase in the static power consumption. The accelerated-detection comparator was fabricated in UMC 180 nm technology. The measurements show that the proposed technique increases the comparator-operating frequency more than twice and reduces the power consumption by 25% compared to similar circuits reported earlier. The comparisons are performed at a maximum clock frequency of 43 MHz while consuming 2.4 μW power from a supply of 1.8 V.

Key concepts: Comparator, Swing, Power (physics), Power consumption, Clock rate, Computer science, Electronic engineering, Electrical engineering

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