Review of Four Improving Designs of Dynamic Latch Comparator
Sudong Wang
Abstract
Open-access reader
Sudong Wang
Abstract
Open-access reader
In this paper, four disparate designs of dynamic latch comparators are discussed consecutively. By improving the design of the pre-amplifier stage, the double tail comparator provides a good power-speed trade-off. Further, Differential pair amplifiers are implemented in the second design, which has better comparison speed and energy dissipation. Next, a bulk-driven structure is employed on the comparator design to improve the comparison speed. Finally, a dynamic comparator utilizes a floating reservoir capacitor and a positive feedback bulk structure is introduced to achieve higher energy efficiency. The overall performance of these comparators is evaluated in this paper.
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In this paper, four disparate designs of dynamic latch comparators are discussed consecutively. By improving the design of the pre-amplifier stage, the double tail comparator provides a good power-speed trade-off. Further, Differential pair amplifiers are implemented in the second design, which has better comparison speed and energy dissipation. Next, a bulk-driven structure is employed on the comparator design to improve the comparison speed. Finally, a dynamic comparator utilizes a floating reservoir capacitor and a positive feedback bulk structure is introduced to achieve higher energy efficiency. The overall performance of these comparators is evaluated in this paper.
Key concepts: Comparator, Comparator applications, Dissipation, Amplifier, Computer science, Electronic engineering, Capacitor, Power (physics)