2020•Unpublished venueRequires access

Design of Two-Gain-Level Amplifier for $Ka$-Band Phase Shifters Using 0.15 μm GaAs pHEMT Process

Kim Tuyen Trinh, Chia-Han Lin, Hsuan‐Ling Kao, Hsien‐Chin Chiu, Nemai Chandra Karmakar

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Abstract

A two-gain-level GaAs pHEMT amplifier adopting Cascode and common source topologies, operating at 37 GHz for radiometer active phase shifters was designed. The EM simulated results show that the developed amplifier achieves a maximum gain of 19.4 dB and gain difference of 7.6 dB. The typical noise figures of 6 dB and 7.2 dB in high and low gain states respectively within 1 GHz bandwidth. DC power consumption is about 217 mW. Within the bandwidth of interest, the gain flatness is about ± 0.5 dB; the input and output return losses are larger 9 dB at 37 GHz for both gain stages. Gain levels are obtained by changing the gate voltage in the Cascode stage. The MMIC chip is fabricated by using 0.15 μm GaAs pHEMT Process. The total core area of the chip with all the pads is 1.5 mm × 1 mm.

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What this paper is about

A two-gain-level GaAs pHEMT amplifier adopting Cascode and common source topologies, operating at 37 GHz for radiometer active phase shifters was designed. The EM simulated results show that the developed amplifier achieves a maximum gain of 19.4 dB and gain difference of 7.6 dB. The typical noise figures of 6 dB and 7.2 dB in high and low gain states respectively within 1 GHz bandwidth. DC power consumption is about 217 mW. Within the bandwidth of interest, the gain flatness is about ± 0.5 dB; the input and output return losses are larger 9 dB at 37 GHz for both gain stages. Gain levels are obtained by changing the gate voltage in the Cascode stage. The MMIC chip is fabricated by using 0.15 μm GaAs pHEMT Process. The total core area of the chip with all the pads is 1.5 mm × 1 mm.

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Available abstract

A two-gain-level GaAs pHEMT amplifier adopting Cascode and common source topologies, operating at 37 GHz for radiometer active phase shifters was designed. The EM simulated results show that the developed amplifier achieves a maximum gain of 19.4 dB and gain difference of 7.6 dB. The typical noise figures of 6 dB and 7.2 dB in high and low gain states respectively within 1 GHz bandwidth. DC power consumption is about 217 mW. Within the bandwidth of interest, the gain flatness is about ± 0.5 dB; the input and output return losses are larger 9 dB at 37 GHz for both gain stages. Gain levels are obtained by changing the gate voltage in the Cascode stage. The MMIC chip is fabricated by using 0.15 μm GaAs pHEMT Process. The total core area of the chip with all the pads is 1.5 mm × 1 mm.

Key concepts: Cascode, High-electron-mobility transistor, Monolithic microwave integrated circuit, Noise figure, Amplifier, Materials science, Optoelectronics, Electrical engineering

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Design of Two-Gain-Level Amplifier for $Ka$-Band Phase Shifters Using 0.15 μm GaAs pHEMT Process — Research Paper | ScholarLens