2017Unpublished venueRequires access

Modelling of silicon carbide JFET in SPICE

Kamil Bargieł, Damian Bisewski

Open publisher page 2 citations

Abstract

The paper deals with the problem of modelling and analysis in SPICE on properties of Junction Effect Transistor made of Silicon Carbide. An modified model of the investigated transistor was formulated and experimentally verified. The proper procedure of parameter estimation for the elaborated model was carried out. The evaluation of accuracy and examination of usefulness of the elaborated model have been performed by comparison of measured and calculated devices characteristics.

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What this paper is about

The paper deals with the problem of modelling and analysis in SPICE on properties of Junction Effect Transistor made of Silicon Carbide. An modified model of the investigated transistor was formulated and experimentally verified. The proper procedure of parameter estimation for the elaborated model was carried out. The evaluation of accuracy and examination of usefulness of the elaborated model have been performed by comparison of measured and calculated devices characteristics.

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OpenAlex reports 2 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

The paper deals with the problem of modelling and analysis in SPICE on properties of Junction Effect Transistor made of Silicon Carbide. An modified model of the investigated transistor was formulated and experimentally verified. The proper procedure of parameter estimation for the elaborated model was carried out. The evaluation of accuracy and examination of usefulness of the elaborated model have been performed by comparison of measured and calculated devices characteristics.

Key concepts: JFET, Spice, Silicon carbide, Transistor, Materials science, Silicon, Electronic engineering, Computer science

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