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Bit error rate engineering for spin-transfer-torque MRAM

Ken Chi Lik Lee

Open publisher page 2 citations

Abstract

Probabilistic nature of magnetic tunnel junctions (MTJs) poses a new type reliability challenges for spin-transfer-torque MRAM (STT-MRAM). Switching current and thermal barrier need to be co-optimized to control bit error rate margins of STT-MRAM. This requires deeper understanding about thermal disturbance and soft write errors of MTJ devices. In this tutorial, we review basic mechanisms that govern the bit error rates of STT-MRAM and discuss the effect of the probabilistic nature of MTJ devices on STT-MRAM reliability engineering.

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What this paper is about

Probabilistic nature of magnetic tunnel junctions (MTJs) poses a new type reliability challenges for spin-transfer-torque MRAM (STT-MRAM). Switching current and thermal barrier need to be co-optimized to control bit error rate margins of STT-MRAM. This requires deeper understanding about thermal disturbance and soft write errors of MTJ devices. In this tutorial, we review basic mechanisms that govern the bit error rates of STT-MRAM and discuss the effect of the probabilistic nature of MTJ devices on STT-MRAM reliability engineering.

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Available abstract

Probabilistic nature of magnetic tunnel junctions (MTJs) poses a new type reliability challenges for spin-transfer-torque MRAM (STT-MRAM). Switching current and thermal barrier need to be co-optimized to control bit error rate margins of STT-MRAM. This requires deeper understanding about thermal disturbance and soft write errors of MTJ devices. In this tutorial, we review basic mechanisms that govern the bit error rates of STT-MRAM and discuss the effect of the probabilistic nature of MTJ devices on STT-MRAM reliability engineering.

Key concepts: Magnetoresistive random-access memory, Spin-transfer torque, Torque, Computer science, Transfer (computing), Spin (aerodynamics), Bit error rate, Electrical engineering

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