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2003•Unpublished venueRequires access

A 5-volt contactless array 256 kbit flash EEPROM technology

Michael Gill, Rinn Cleavelin, Siqi Lin, I. D'Arrigo, Giovanni Santin, P. Shah, Anh Van Nguyen, J. Esquivel, B.R. Riemenschneider, J. Paterson

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Abstract

A contactless cell array technology has been developed for a single-power-supply 5V-only CMOS flash EEPROM (electrically erasable programmable read-only memory). The technology's suitability for VLSI memories has been demonstrated by a 256-kb flash EEPROM test vehicle. This low-current approach has been realized with cell area and cost comparable to those of the recently reported dual-power-supply flash EEPROMs.>

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What this paper is about

A contactless cell array technology has been developed for a single-power-supply 5V-only CMOS flash EEPROM (electrically erasable programmable read-only memory). The technology's suitability for VLSI memories has been demonstrated by a 256-kb flash EEPROM test vehicle. This low-current approach has been realized with cell area and cost comparable to those of the recently reported dual-power-supply flash EEPROMs.>

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OpenAlex reports 8 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

A contactless cell array technology has been developed for a single-power-supply 5V-only CMOS flash EEPROM (electrically erasable programmable read-only memory). The technology's suitability for VLSI memories has been demonstrated by a 256-kb flash EEPROM test vehicle. This low-current approach has been realized with cell area and cost comparable to those of the recently reported dual-power-supply flash EEPROMs.>

Key concepts: EEPROM, EPROM, Flash (photography), CMOS, Non-volatile memory, Computer hardware, Electrical engineering, Microcontroller

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