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A 60ns 16Mb Flash EEPROM With Program And Erase Sequence Controller

T. Nakayama, S. Kobayashi, Y. Miyawaki, Y. Terada, N. Alika, Ming Chi, H. Arima, T. Matsukawa, T. Yoshihara

Open publisher page 17 citations

Abstract

An erase and program control system is used in this 60ns 16Mb flash EEPROM intended for internal and external storage in the palm-top and notebook personal computers. The stackedgate flash EEPROM demonstrates that an electrically-erasable nonvolatile memory can be constructed in almost the same chip area as UV-erasable EPROM.1• 2 However, there are several problems to be solved in high-density flash EEPROM beyond 16Mb. The problems related to the erasure operation are: 1) overerasure of the 16Mb memory array, 2) large Vpp current caused by the band-to-band tunneling at the source region overlapping the floating gate of memory cells, and 3) long erasure time resulting from programming-before-erasure.

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What this paper is about

An erase and program control system is used in this 60ns 16Mb flash EEPROM intended for internal and external storage in the palm-top and notebook personal computers. The stackedgate flash EEPROM demonstrates that an electrically-erasable nonvolatile memory can be constructed in almost the same chip area as UV-erasable EPROM.1• 2 However, there are several problems to be solved in high-density flash EEPROM beyond 16Mb. The problems related to the erasure operation are: 1) overerasure of the 16Mb memory array, 2) large Vpp current caused by the band-to-band tunneling at the source region overlapping the floating gate of memory cells, and 3) long erasure time resulting from programming-before-erasure.

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OpenAlex reports 17 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

An erase and program control system is used in this 60ns 16Mb flash EEPROM intended for internal and external storage in the palm-top and notebook personal computers. The stackedgate flash EEPROM demonstrates that an electrically-erasable nonvolatile memory can be constructed in almost the same chip area as UV-erasable EPROM.1• 2 However, there are several problems to be solved in high-density flash EEPROM beyond 16Mb. The problems related to the erasure operation are: 1) overerasure of the 16Mb memory array, 2) large Vpp current caused by the band-to-band tunneling at the source region overlapping the floating gate of memory cells, and 3) long erasure time resulting from programming-before-erasure.

Key concepts: EEPROM, EPROM, Erasure, Flash memory, Flash (photography), Computer science, Non-volatile memory, Non-volatile random-access memory

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