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A new architecture of NVRAM

Yasushi Terada, Kaiuo Kobayashi, Takeshi Nakayama, Hideaki Arima, Tsutomu Yoshihara

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Abstract

High density EEPROMs beyond 04 K have already been introduced into the market. These EEPROMs' application, however, is limited because of lack of erase/write endurance and a long programming time. High density NVRAM which combines a RAM ceil bit-by-bit with EEPROM cell is desired.

About this research paper

What this paper is about

High density EEPROMs beyond 04 K have already been introduced into the market. These EEPROMs' application, however, is limited because of lack of erase/write endurance and a long programming time. High density NVRAM which combines a RAM ceil bit-by-bit with EEPROM cell is desired.

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Available abstract

High density EEPROMs beyond 04 K have already been introduced into the market. These EEPROMs' application, however, is limited because of lack of erase/write endurance and a long programming time. High density NVRAM which combines a RAM ceil bit-by-bit with EEPROM cell is desired.

Key concepts: EEPROM, Non-volatile random-access memory, EPROM, Non-volatile memory, Computer science, Embedded system, Random access memory, Computer hardware

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