Design of high-speed image processing system based on FPGA and DSP
LI Xiu-sheng
Abstract
LI Xiu-sheng
Abstract
A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor was designed in this paper.With a dual-port RAM,a novel data transmission structure was designed,and ping-pong technique was used to implement the buffering of the high-speed real-time image data.The total working process was completed in FPGA and DSP's division and cooperation,so it is 25% higher than the processing system based on the single DSP in performance.Other algorithms can be transplanted to the system easily for the system's reconfigurability characteristic.
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A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor was designed in this paper.With a dual-port RAM,a novel data transmission structure was designed,and ping-pong technique was used to implement the buffering of the high-speed real-time image data.The total working process was completed in FPGA and DSP's division and cooperation,so it is 25% higher than the processing system based on the single DSP in performance.Other algorithms can be transplanted to the system easily for the system's reconfigurability characteristic.
Key concepts: Digital signal processing, Reconfigurability, Field-programmable gate array, Computer hardware, Computer science, Embedded system, Image processing, Process (computing)