Design of high-speed image processing system based on FPGA and DSP
Suhua Chen
Abstract
Suhua Chen
Abstract
In order to improve the performance of image processing embedded system and reduce its power consumption,a high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor(DSP) is presented in this paper.DSP as a main processor is used to control the module of image process,and FPGA chip as a co-processor is used to control the data logic.In the whole system,a novel data transmission structure with a dual-port RAM(CY7C025AV-15AI) is applied to the high-speed real-time image data by ping-pong technique.Because all operation in the system is divided between the FPGA and DSP in the form of the pipelined,the performance of the system is 25% higher than that of the processing system based on the single DSP.The system is easy to transplant other algorithms into it due to its reconfigurability.
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In order to improve the performance of image processing embedded system and reduce its power consumption,a high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor(DSP) is presented in this paper.DSP as a main processor is used to control the module of image process,and FPGA chip as a co-processor is used to control the data logic.In the whole system,a novel data transmission structure with a dual-port RAM(CY7C025AV-15AI) is applied to the high-speed real-time image data by ping-pong technique.Because all operation in the system is divided between the FPGA and DSP in the form of the pipelined,the performance of the system is 25% higher than that of the processing system based on the single DSP.The system is easy to transplant other algorithms into it due to its reconfigurability.
Key concepts: Digital signal processing, Reconfigurability, Field-programmable gate array, Computer science, Computer hardware, Embedded system, Image processing, Digital signal processor