2012Modern Electronics TechniqueRequires access

Design of high-speed image processing system based on FPGA and DSP

Suhua Chen

Open publisher page 0 citations

Abstract

In order to improve the performance of image processing embedded system and reduce its power consumption,a high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor(DSP) is presented in this paper.DSP as a main processor is used to control the module of image process,and FPGA chip as a co-processor is used to control the data logic.In the whole system,a novel data transmission structure with a dual-port RAM(CY7C025AV-15AI) is applied to the high-speed real-time image data by ping-pong technique.Because all operation in the system is divided between the FPGA and DSP in the form of the pipelined,the performance of the system is 25% higher than that of the processing system based on the single DSP.The system is easy to transplant other algorithms into it due to its reconfigurability.

About this research paper

What this paper is about

In order to improve the performance of image processing embedded system and reduce its power consumption,a high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor(DSP) is presented in this paper.DSP as a main processor is used to control the module of image process,and FPGA chip as a co-processor is used to control the data logic.In the whole system,a novel data transmission structure with a dual-port RAM(CY7C025AV-15AI) is applied to the high-speed real-time image data by ping-pong technique.Because all operation in the system is divided between the FPGA and DSP in the form of the pipelined,the performance of the system is 25% higher than that of the processing system based on the single DSP.The system is easy to transplant other algorithms into it due to its reconfigurability.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

In order to improve the performance of image processing embedded system and reduce its power consumption,a high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor(DSP) is presented in this paper.DSP as a main processor is used to control the module of image process,and FPGA chip as a co-processor is used to control the data logic.In the whole system,a novel data transmission structure with a dual-port RAM(CY7C025AV-15AI) is applied to the high-speed real-time image data by ping-pong technique.Because all operation in the system is divided between the FPGA and DSP in the form of the pipelined,the performance of the system is 25% higher than that of the processing system based on the single DSP.The system is easy to transplant other algorithms into it due to its reconfigurability.

Key concepts: Digital signal processing, Reconfigurability, Field-programmable gate array, Computer science, Computer hardware, Embedded system, Image processing, Digital signal processor

Related papers

Back to paper searchBrowse research topicsOriginal source
Design of high-speed image processing system based on FPGA and DSP — Research Paper | ScholarLens