2014Radar Science and TechnologyRequires access

Implemention of CORDIC Algorithm Based on Folding Transformation

Huang Yu-shen

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Abstract

The CORDIC algorithm is an important method in modern digital signal processing.The CORDIC algorithm functions in an iterative manner,which makes it easy to compute.So the application of the CORDIC algorithm has become popular in many arithmetical operations,such as multiplication,division,square root and some trigonometric functions.To ensure the accuracy of the CORDIC algorithm,large numbers of iterations is required,which leads to large resource consumption in its FPGA implemention.To reduce its hardware resource consumption,a new structure for CORDIC algorithm based on folding transformation is proposed.Compared with traditional pipelined CORDIC algorithm,the folded structure costs much less hardware resources.This paper introduces the structure of the folded CORDIC algorithm in details and shows its simulation results.

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What this paper is about

The CORDIC algorithm is an important method in modern digital signal processing.The CORDIC algorithm functions in an iterative manner,which makes it easy to compute.So the application of the CORDIC algorithm has become popular in many arithmetical operations,such as multiplication,division,square root and some trigonometric functions.To ensure the accuracy of the CORDIC algorithm,large numbers of iterations is required,which leads to large resource consumption in its FPGA implemention.To reduce its hardware resource consumption,a new structure for CORDIC algorithm based on folding transformation is proposed.Compared with traditional pipelined CORDIC algorithm,the folded structure costs much less hardware resources.This paper introduces the structure of the folded CORDIC algorithm in details and shows its simulation results.

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Available abstract

The CORDIC algorithm is an important method in modern digital signal processing.The CORDIC algorithm functions in an iterative manner,which makes it easy to compute.So the application of the CORDIC algorithm has become popular in many arithmetical operations,such as multiplication,division,square root and some trigonometric functions.To ensure the accuracy of the CORDIC algorithm,large numbers of iterations is required,which leads to large resource consumption in its FPGA implemention.To reduce its hardware resource consumption,a new structure for CORDIC algorithm based on folding transformation is proposed.Compared with traditional pipelined CORDIC algorithm,the folded structure costs much less hardware resources.This paper introduces the structure of the folded CORDIC algorithm in details and shows its simulation results.

Key concepts: CORDIC, Computer science, Algorithm, Field-programmable gate array, Transformation (genetics), Multiplication (music), Folding (DSP implementation), Digital signal processing

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