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2019•Unpublished venueRequires access

Design and Implementation of an Efficient Modified CORDIC Algorithm

Yuan Xue, Zhongsong Ma

Open publisher page 22 citations

Abstract

Coordinate Rotation Digital Computer (CORDIC) algorithm has greatly improved the efficiency of the hardware implementation of digital signal processing algorithms and other mathematical operations. While there exist quite a lot of redundant iterations in the Conventional CORDIC algorithm, this paper proposes a novel efficient modified CORDIC algorithm combining the Conventional CORDIC algorithm with the VSF CORDIC algorithm. And this new method has already been simulated and implemented on Cyclone IV FPGA. The results show that the number of iterations has been obviously reduced while the hardware resource consumption is also decreased to some extent.

About this research paper

What this paper is about

Coordinate Rotation Digital Computer (CORDIC) algorithm has greatly improved the efficiency of the hardware implementation of digital signal processing algorithms and other mathematical operations. While there exist quite a lot of redundant iterations in the Conventional CORDIC algorithm, this paper proposes a novel efficient modified CORDIC algorithm combining the Conventional CORDIC algorithm with the VSF CORDIC algorithm. And this new method has already been simulated and implemented on Cyclone IV FPGA. The results show that the number of iterations has been obviously reduced while the hardware resource consumption is also decreased to some extent.

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OpenAlex reports 22 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

Coordinate Rotation Digital Computer (CORDIC) algorithm has greatly improved the efficiency of the hardware implementation of digital signal processing algorithms and other mathematical operations. While there exist quite a lot of redundant iterations in the Conventional CORDIC algorithm, this paper proposes a novel efficient modified CORDIC algorithm combining the Conventional CORDIC algorithm with the VSF CORDIC algorithm. And this new method has already been simulated and implemented on Cyclone IV FPGA. The results show that the number of iterations has been obviously reduced while the hardware resource consumption is also decreased to some extent.

Key concepts: CORDIC, Field-programmable gate array, Computer science, Algorithm, Digital signal processing, Parallel computing, Algorithm design, Rotation (mathematics)

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