A cordic arithmetic processor
Shaoyun Wang, Earl E. Swartzlander
Abstract
Shaoyun Wang, Earl E. Swartzlander
Abstract
This research focuses on developing a high speed arithmetic processor based on the COordinate Rotation DIgital Computer (CORDIC) technique for trigonometric function evaluation. The CORDIC algorithm employs only simple primitive arithmetic operations such as additions and shifts rather than multiplications in each iteration. This attractive hardware property makes the CORDIC algorithm a widely accepted approach for algorithms involved with plane rotation, vectoring, and elementary function evaluation. A critically damped CORDIC algorithm is proposed to speed up the convergence process of the algorithm by the analogy between CORDIC algorithm convergent process and a second control system. The hybrid CORDIC algorithm, on the other hand, reveals the intrinsic parallel theory of the algorithm. Merging the scale factor into the iterations provides an alternative to execute the algorithm. It is also shown that the algorithm could be symmetric merged to gain area advantage. Hardware design guidelines are studied to facilitate the CORDIC processor design. The proposed hybrid CORDIC processor is implemented, verified, and evaluated.
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This research focuses on developing a high speed arithmetic processor based on the COordinate Rotation DIgital Computer (CORDIC) technique for trigonometric function evaluation. The CORDIC algorithm employs only simple primitive arithmetic operations such as additions and shifts rather than multiplications in each iteration. This attractive hardware property makes the CORDIC algorithm a widely accepted approach for algorithms involved with plane rotation, vectoring, and elementary function evaluation. A critically damped CORDIC algorithm is proposed to speed up the convergence process of the algorithm by the analogy between CORDIC algorithm convergent process and a second control system. The hybrid CORDIC algorithm, on the other hand, reveals the intrinsic parallel theory of the algorithm. Merging the scale factor into the iterations provides an alternative to execute the algorithm. It is also shown that the algorithm could be symmetric merged to gain area advantage. Hardware design guidelines are studied to facilitate the CORDIC processor design. The proposed hybrid CORDIC processor is implemented, verified, and evaluated.
Key concepts: CORDIC, Arithmetic, Computer science, Trigonometric functions, Rotation (mathematics), Elementary function, Algorithm, Process (computing)