2015Electronic Design EngineeringRequires access

On-chip debug system design based on JTAG for So C

Ru Chen

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Abstract

The paper presents the design of On-chip debug system based on JTAG for So C, the system mainly includes JTAG interface and On-chip debug mode control unit. By executing different debugging instructions, On-chip debug system can perform debug functions, for example, setting breakpoints, single step execution, monitoring the registers and memory,programming on line and configuring microcontroller's execution state. Meanwhile, this paper expatiates working principle and hardware structure of the On-chip debug system.

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What this paper is about

The paper presents the design of On-chip debug system based on JTAG for So C, the system mainly includes JTAG interface and On-chip debug mode control unit. By executing different debugging instructions, On-chip debug system can perform debug functions, for example, setting breakpoints, single step execution, monitoring the registers and memory,programming on line and configuring microcontroller's execution state. Meanwhile, this paper expatiates working principle and hardware structure of the On-chip debug system.

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Available abstract

The paper presents the design of On-chip debug system based on JTAG for So C, the system mainly includes JTAG interface and On-chip debug mode control unit. By executing different debugging instructions, On-chip debug system can perform debug functions, for example, setting breakpoints, single step execution, monitoring the registers and memory,programming on line and configuring microcontroller's execution state. Meanwhile, this paper expatiates working principle and hardware structure of the On-chip debug system.

Key concepts: Debugging, Background debug mode interface, Embedded system, Microcontroller, Computer science, Chip, Interface (matter), Computer hardware

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