Design and Implementation of On-chip Debug Features in Embedded Processor
C Design
Abstract
C Design
Abstract
With Godson-1 processor as the research prototype,a design scheme of on-chip debug features in embedded processor is presented in this paper.In the scheme the IEEE P1149.1 JTAG TAP module is extended and some control logic is added inside the processor core to provide the following new capabilities for software and system debug: software debug breakpoint,debug interrupt,hardware breakpoint, single-step execution,etc.With only a JTAG debug cable,the debug host can access the internal resources and control the program running of the processor under debug.With these on-chip debug features,the software development and system debug are facilitated greatly.
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With Godson-1 processor as the research prototype,a design scheme of on-chip debug features in embedded processor is presented in this paper.In the scheme the IEEE P1149.1 JTAG TAP module is extended and some control logic is added inside the processor core to provide the following new capabilities for software and system debug: software debug breakpoint,debug interrupt,hardware breakpoint, single-step execution,etc.With only a JTAG debug cable,the debug host can access the internal resources and control the program running of the processor under debug.With these on-chip debug features,the software development and system debug are facilitated greatly.
Key concepts: Background debug mode interface, Debugging, Embedded system, Computer science, Software, ARM architecture, Microprocessor, Scheme (mathematics)