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A Wide-Band Chirp-DDS and Its Implementation on FPGA

Jin Hui Xue

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Abstract

A wideband ChirpDDS is designed and implemented on Altera's Flex10K FPGA This device includes a pipeline 32bit frequencyphase accumulator and ROM lookup table It has achieved a system clock of 100 MHz,a frequency switching time of 068 μs,a tuning latency of 08 μs,a frequency resolution of 002328 Hz,and an output frequency range from DC to 40 MHz

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What this paper is about

A wideband ChirpDDS is designed and implemented on Altera's Flex10K FPGA This device includes a pipeline 32bit frequencyphase accumulator and ROM lookup table It has achieved a system clock of 100 MHz,a frequency switching time of 068 μs,a tuning latency of 08 μs,a frequency resolution of 002328 Hz,and an output frequency range from DC to 40 MHz

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Available abstract

A wideband ChirpDDS is designed and implemented on Altera's Flex10K FPGA This device includes a pipeline 32bit frequencyphase accumulator and ROM lookup table It has achieved a system clock of 100 MHz,a frequency switching time of 068 μs,a tuning latency of 08 μs,a frequency resolution of 002328 Hz,and an output frequency range from DC to 40 MHz

Key concepts: Chirp, Field-programmable gate array, Accumulator (cryptography), Pipeline (software), Direct digital synthesizer, Computer science, Electronic engineering, Computer hardware

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