Yuji Zhang
Abstract
In this paper we use FPGA implmenting sin signal generator. It is compose from accumulator,adder and ROM. There are much advantage in this DDS. There are wide frequency range, minimum step size and adjust of frequency. The frequency is up to 12.5 MHz.
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In this paper we use FPGA implmenting sin signal generator. It is compose from accumulator,adder and ROM. There are much advantage in this DDS. There are wide frequency range, minimum step size and adjust of frequency. The frequency is up to 12.5 MHz.
Key concepts: Accumulator (cryptography), Adder, Field-programmable gate array, Computer science, Signal generator, Generator (circuit theory), Computer hardware, Electronic engineering