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2014•Electronic Design EngineeringRequires access

Design of decoding IRIG-B(DC) based on FPGA

XI Hai-ya

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Abstract

IRIG-B(DC) code is a standard time code,which is widely used in the aerospace measurement and control area.The equipment unit in the control system need to demodulate time information from IRIG-B(DC).The normal IRIG-B(DC) decoder is mostly designed based on microcontroller system,its configuration is complex and easy to be interferred.A new design of decoding IRIG-B(DC) by programming on FPGA is presented in this paper.The simulation of the decoder design using MAX+plus II simulation software is alao given.The design is proved to be corrent and effective in many applications.The results have demonstrated that the design can precisely demodulate time information from IRIG-B(DC),and the design is simple,flexible,highly reliable and highly precisie.

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What this paper is about

IRIG-B(DC) code is a standard time code,which is widely used in the aerospace measurement and control area.The equipment unit in the control system need to demodulate time information from IRIG-B(DC).The normal IRIG-B(DC) decoder is mostly designed based on microcontroller system,its configuration is complex and easy to be interferred.A new design of decoding IRIG-B(DC) by programming on FPGA is presented in this paper.The simulation of the decoder design using MAX+plus II simulation software is alao given.The design is proved to be corrent and effective in many applications.The results have demonstrated that the design can precisely demodulate time information from IRIG-B(DC),and the design is simple,flexible,highly reliable and highly precisie.

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Available abstract

IRIG-B(DC) code is a standard time code,which is widely used in the aerospace measurement and control area.The equipment unit in the control system need to demodulate time information from IRIG-B(DC).The normal IRIG-B(DC) decoder is mostly designed based on microcontroller system,its configuration is complex and easy to be interferred.A new design of decoding IRIG-B(DC) by programming on FPGA is presented in this paper.The simulation of the decoder design using MAX+plus II simulation software is alao given.The design is proved to be corrent and effective in many applications.The results have demonstrated that the design can precisely demodulate time information from IRIG-B(DC),and the design is simple,flexible,highly reliable and highly precisie.

Key concepts: Field-programmable gate array, Decoding methods, Computer science, Microcontroller, Code (set theory), Demodulation, Embedded system, Computer hardware

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