Decoding of IRIG-B(DC) code based on FPGA
Weiping Lu
Abstract
Weiping Lu
Abstract
A decoding means of IRIG-B(DC) time code is proposed on the basis of analyzing the wave characteristics of IRIG-B(DC)code.This design is made up of peripheral circuits and FPGA to implement decoding of IRIG-B(DC) code and 1 pps signal output and real-time time display and serial asynchronous communication.Compared with traditional methods,it has lots of advantages such as smaller size,lower cost and more reliable stability,and can replace the main functions of traditional B-code device.
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A decoding means of IRIG-B(DC) time code is proposed on the basis of analyzing the wave characteristics of IRIG-B(DC)code.This design is made up of peripheral circuits and FPGA to implement decoding of IRIG-B(DC) code and 1 pps signal output and real-time time display and serial asynchronous communication.Compared with traditional methods,it has lots of advantages such as smaller size,lower cost and more reliable stability,and can replace the main functions of traditional B-code device.
Key concepts: Decoding methods, Field-programmable gate array, Computer science, Asynchronous communication, Code (set theory), SIGNAL (programming language), Computer hardware, Real-time computing