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2012•Journal of Time and FrequencyRequires access

Design and implementation of IRIG-B(DC) code demodulation based on FPGA

Junliang Liu

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Abstract

IRIG-B code is an universal format of time code in the world and is widely used in timing systems.According to the characteristics of IRIG-B code modulation,a decoding plan based on FPGA is introduced with emphases on how to extract the synchronous second signal accurately from the synchronous timing sequency and how to get the time information included in the B code.The whole project is designed by using Verilog HDL and has been implemented successfully with the results shown.

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What this paper is about

IRIG-B code is an universal format of time code in the world and is widely used in timing systems.According to the characteristics of IRIG-B code modulation,a decoding plan based on FPGA is introduced with emphases on how to extract the synchronous second signal accurately from the synchronous timing sequency and how to get the time information included in the B code.The whole project is designed by using Verilog HDL and has been implemented successfully with the results shown.

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Available abstract

IRIG-B code is an universal format of time code in the world and is widely used in timing systems.According to the characteristics of IRIG-B code modulation,a decoding plan based on FPGA is introduced with emphases on how to extract the synchronous second signal accurately from the synchronous timing sequency and how to get the time information included in the B code.The whole project is designed by using Verilog HDL and has been implemented successfully with the results shown.

Key concepts: Field-programmable gate array, Code (set theory), Verilog, Computer science, Decoding methods, Demodulation, SIGNAL (programming language), Plan (archaeology)

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