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Design and Simulation of FIR Digital Filter Based on FPGA

YE Yadon

Open publisher page 1 citations

Abstract

A 16 taps FIR digital low-pass filter is designed,whose performance is improved by parallel distributed arithmetic. The FDATool of Matlab is used to design the filter coefficients. The sub module and system module are designed with Verilog HDL and Block Diagram respectively. Simulation with Matlab and QuartusII show that the designed system has stable performance,good effect and strong applicability.

About this research paper

What this paper is about

A 16 taps FIR digital low-pass filter is designed,whose performance is improved by parallel distributed arithmetic. The FDATool of Matlab is used to design the filter coefficients. The sub module and system module are designed with Verilog HDL and Block Diagram respectively. Simulation with Matlab and QuartusII show that the designed system has stable performance,good effect and strong applicability.

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Available abstract

A 16 taps FIR digital low-pass filter is designed,whose performance is improved by parallel distributed arithmetic. The FDATool of Matlab is used to design the filter coefficients. The sub module and system module are designed with Verilog HDL and Block Diagram respectively. Simulation with Matlab and QuartusII show that the designed system has stable performance,good effect and strong applicability.

Key concepts: Verilog, Block diagram, MATLAB, Field-programmable gate array, Finite impulse response, Computer science, Filter (signal processing), Block (permutation group theory)

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