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2013•International Journal of Computer ApplicationsOpen access

FIR Filter Designing using Xilinx System Generator

Anurag Aggarwal, Astha Satija, Tushar Nagpal

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Abstract

Xilinx System generator is used to design efficient DSP algorithm on FPGA.In this paper Finite Impulse Response (FIR) filter is designed using Simulink in Xilinx System generator.The filters have been designed using Distributed Arithmetic (DA) Algorithm.This design has been further synthesized on Xilinx Virtex-4 FPGA kit.Finally comparison is done between the results obtained from the software simulations and those from FPGA using hardware co-simulation.

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What this paper is about

Xilinx System generator is used to design efficient DSP algorithm on FPGA.In this paper Finite Impulse Response (FIR) filter is designed using Simulink in Xilinx System generator.The filters have been designed using Distributed Arithmetic (DA) Algorithm.This design has been further synthesized on Xilinx Virtex-4 FPGA kit.Finally comparison is done between the results obtained from the software simulations and those from FPGA using hardware co-simulation.

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Available abstract

Xilinx System generator is used to design efficient DSP algorithm on FPGA.In this paper Finite Impulse Response (FIR) filter is designed using Simulink in Xilinx System generator.The filters have been designed using Distributed Arithmetic (DA) Algorithm.This design has been further synthesized on Xilinx Virtex-4 FPGA kit.Finally comparison is done between the results obtained from the software simulations and those from FPGA using hardware co-simulation.

Key concepts: Computer science, Generator (circuit theory), Field-programmable gate array, Filter (signal processing), Finite impulse response, Embedded system, Computer hardware, Algorithm

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