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2007•Journal of Qiqihar UniversityRequires access

Low power design for path metrics unit of viterbi decoder

Gang Li

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Abstract

This paper does a research on low power design for the path metrics unit of Viterbi decoder which is compatible with DVB-T standards.In order to reduce the power dissipation,the modified T-algorithm is used to implement the add-compare-select units so that the path metric can be represented in 5 bits;the area-efficient architecture is used in the path metric management unit;and a 5 step pipelining architecture is used in the path metric memory unit.

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What this paper is about

This paper does a research on low power design for the path metrics unit of Viterbi decoder which is compatible with DVB-T standards.In order to reduce the power dissipation,the modified T-algorithm is used to implement the add-compare-select units so that the path metric can be represented in 5 bits;the area-efficient architecture is used in the path metric management unit;and a 5 step pipelining architecture is used in the path metric memory unit.

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Available abstract

This paper does a research on low power design for the path metrics unit of Viterbi decoder which is compatible with DVB-T standards.In order to reduce the power dissipation,the modified T-algorithm is used to implement the add-compare-select units so that the path metric can be represented in 5 bits;the area-efficient architecture is used in the path metric management unit;and a 5 step pipelining architecture is used in the path metric memory unit.

Key concepts: Path (computing), Viterbi algorithm, Computer science, Viterbi decoder, Metric (unit), Power (physics), Soft output Viterbi algorithm, Unit (ring theory)

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