An ASIP compiler design and implementation

A new code-generation algorithm which handles code selection and register allocation simultaneously is presented to satisfy register restriction of application specific instruction processors(ASIPs) and real-time requirement from applications. A model is presented to describe the complicated restrictions among registers of ASIP register file in this paper. The traditional graph-coloring algorithm is improved to be adapted to ASIP according to this model. The register allocation is translated into how to simplify this graph. At last the algorithm is applied to an ASIP compiler. Experimental results show it has better performance of code-generation and less register spilling than traditional code-generation algorithm.