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A design of high performance MCS-51 compatible microcontroller

Quan Chun-juan

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Abstract

It is presented the design of a high performance,reusable and MCS-51 compatible microcontroller.This microcontroller is implemented in Verilog HDL and fully compatibility with the industrial standards MCS-51 on instruction sets.Be different from standard MCS-51,pre-fetching instruction method,independent bus,and pipeline multiplier and divider module has been implemented in this MCU.Theses changes enhance microcontroller's performance and instruction executing efficiency about 10 times faster than before.A user has opportunity to determine the MCU's RAM and ROM sizes in order to improve flexibility.Otherwise,considering power consumption,a special CCU(Clock Controller Unit) is adopted to implement lower working frequency,standby and hibernation mode.This MCU has been mapped onto FPGA platform and tested successfully.

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What this paper is about

It is presented the design of a high performance,reusable and MCS-51 compatible microcontroller.This microcontroller is implemented in Verilog HDL and fully compatibility with the industrial standards MCS-51 on instruction sets.Be different from standard MCS-51,pre-fetching instruction method,independent bus,and pipeline multiplier and divider module has been implemented in this MCU.Theses changes enhance microcontroller's performance and instruction executing efficiency about 10 times faster than before.A user has opportunity to determine the MCU's RAM and ROM sizes in order to improve flexibility.Otherwise,considering power consumption,a special CCU(Clock Controller Unit) is adopted to implement lower working frequency,standby and hibernation mode.This MCU has been mapped onto FPGA platform and tested successfully.

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Available abstract

It is presented the design of a high performance,reusable and MCS-51 compatible microcontroller.This microcontroller is implemented in Verilog HDL and fully compatibility with the industrial standards MCS-51 on instruction sets.Be different from standard MCS-51,pre-fetching instruction method,independent bus,and pipeline multiplier and divider module has been implemented in this MCU.Theses changes enhance microcontroller's performance and instruction executing efficiency about 10 times faster than before.A user has opportunity to determine the MCU's RAM and ROM sizes in order to improve flexibility.Otherwise,considering power consumption,a special CCU(Clock Controller Unit) is adopted to implement lower working frequency,standby and hibernation mode.This MCU has been mapped onto FPGA platform and tested successfully.

Key concepts: Microcontroller, Embedded system, Computer science, Computer hardware, Verilog, Field-programmable gate array

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