FPGA Realization of Video Image Zooming Display

Some commonly used image scaling algorithms were introduced,as well as a comparison among several algorithms.After weighing the algorithm complexity,zoom effects and FPGA logic resources,etc.,the bilinear interpolation algorithm was chosen to achieve image scaling.This work focused on the bilinear interpolation algorithm and the method of FPGA hardware implementation,including image data buffer unit,interpolation coefficient generating unit,as well as the interpolation calculation unit.The realized results show that the bilinear interpolation algorithm and its hardware realizing modules achieve the desired results.