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Analysis and Design of a High Speed Switched Capacitor Dynamic Comparator

Jing Li

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Abstract

A high speed switched capacitor dynamic comparator circuit in CMOS technology is presented.The comparator includes a switched capacitor sampling stage and a dynamic latched comparator.The input voltage range is improved by applying a switched capacitor sampling stage in the input stage.The speed of the dynamic latch is improved by employing two cross-coupled latch and other feedback circuits.The comparator is designed and simulated in a 0.18μm 1.8V CMOS technology and the result shows that it meets the requirement of a 200 MSPS high resolution pipelined ADC.

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What this paper is about

A high speed switched capacitor dynamic comparator circuit in CMOS technology is presented.The comparator includes a switched capacitor sampling stage and a dynamic latched comparator.The input voltage range is improved by applying a switched capacitor sampling stage in the input stage.The speed of the dynamic latch is improved by employing two cross-coupled latch and other feedback circuits.The comparator is designed and simulated in a 0.18μm 1.8V CMOS technology and the result shows that it meets the requirement of a 200 MSPS high resolution pipelined ADC.

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Available abstract

A high speed switched capacitor dynamic comparator circuit in CMOS technology is presented.The comparator includes a switched capacitor sampling stage and a dynamic latched comparator.The input voltage range is improved by applying a switched capacitor sampling stage in the input stage.The speed of the dynamic latch is improved by employing two cross-coupled latch and other feedback circuits.The comparator is designed and simulated in a 0.18μm 1.8V CMOS technology and the result shows that it meets the requirement of a 200 MSPS high resolution pipelined ADC.

Key concepts: Comparator, Switched capacitor, CMOS, Capacitor, Comparator applications, Electronic engineering, Computer science, Dynamic range

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