Design and implementation of frame synchronism system based on FPGA

In order to distinguish a frame data from the receiver of the digital communication system and decode correctly,the paper presents a design method of frame synchronization system on FPGA.The synchronization protection circuit improves the reliability of the system.The frame synchronization circuit is designed and implemented on Quartus II through VHDL language and the imitation and experiment of FPGA design are given.The experiment results show the circuit works accurately and reliably,meets the system design request.