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Research on a Parallel Adder with 6 Binary Addends and Its Interface

Maoxiang Yi

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Abstract

A parallel adder with 6 binary addends and its interface are proposed. Working principle and process of the novel adder are discussed,and its interface extension is described. Finally,MAX+PLUS II is exploited to simulate and validate the proposed adder. Experimental results indicate that the proposed design scheme is not only reasonable,but also can faster calculate 6 binary addends than a carry look-ahead adder using the serial adding scheme.

About this research paper

What this paper is about

A parallel adder with 6 binary addends and its interface are proposed. Working principle and process of the novel adder are discussed,and its interface extension is described. Finally,MAX+PLUS II is exploited to simulate and validate the proposed adder. Experimental results indicate that the proposed design scheme is not only reasonable,but also can faster calculate 6 binary addends than a carry look-ahead adder using the serial adding scheme.

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Available abstract

A parallel adder with 6 binary addends and its interface are proposed. Working principle and process of the novel adder are discussed,and its interface extension is described. Finally,MAX+PLUS II is exploited to simulate and validate the proposed adder. Experimental results indicate that the proposed design scheme is not only reasonable,but also can faster calculate 6 binary addends than a carry look-ahead adder using the serial adding scheme.

Key concepts: Adder, Computer science, Serial binary adder, Carry-save adder, Binary number, Interface (matter), Arithmetic, Scheme (mathematics)

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