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2013•Electronic Design EngineeringRequires access

Design of RS decoder based on FPGA

Mingwei Qin

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Abstract

The decoder structure of Reed-Solomon(255,223) according to CCSDS specification is introduced.It is given that some basic modules in finite field,the reformulated inversion less BM algorithm,and chien search algorithm and Forney algorithm.The design is implemented with three pipelines which decrease the delay of decoder.The decoder is designed and implemented with VHDL.As test result shown,the performance of the decoder described in this paper is excellent and it is applied to high-speed communications.

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What this paper is about

The decoder structure of Reed-Solomon(255,223) according to CCSDS specification is introduced.It is given that some basic modules in finite field,the reformulated inversion less BM algorithm,and chien search algorithm and Forney algorithm.The design is implemented with three pipelines which decrease the delay of decoder.The decoder is designed and implemented with VHDL.As test result shown,the performance of the decoder described in this paper is excellent and it is applied to high-speed communications.

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Available abstract

The decoder structure of Reed-Solomon(255,223) according to CCSDS specification is introduced.It is given that some basic modules in finite field,the reformulated inversion less BM algorithm,and chien search algorithm and Forney algorithm.The design is implemented with three pipelines which decrease the delay of decoder.The decoder is designed and implemented with VHDL.As test result shown,the performance of the decoder described in this paper is excellent and it is applied to high-speed communications.

Key concepts: Soft-decision decoder, VHDL, Field-programmable gate array, Computer science, Decoding methods, Viterbi decoder, Computer hardware, Finite field

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