2006Journal of Tsinghua University(Science and Technology)Requires access

Efficient utilization of scratch-pad memory banks

Kun Tang

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Abstract

A memory allocation algorithm was developed to maximize parallel data access and make full use of CPU processing ability to improve real-time performance of embedded multimedia applications.A scratch-pad memory is assigned to meet the data processing demand with data dynamically transferred to on-chip memory by Direct Memory Access(DMA) to reduce the delays in slow off-chip memory access.Parallel access to multiple memory banks by several data buses and dual access through dual Access Random Access Memory(DARAM) reduces the memory bandwidth limit. Test results show that program run time is reduced by up to 48% using proper memory allocation.The memory assignment method is also easy to implement.

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What this paper is about

A memory allocation algorithm was developed to maximize parallel data access and make full use of CPU processing ability to improve real-time performance of embedded multimedia applications.A scratch-pad memory is assigned to meet the data processing demand with data dynamically transferred to on-chip memory by Direct Memory Access(DMA) to reduce the delays in slow off-chip memory access.Parallel access to multiple memory banks by several data buses and dual access through dual Access Random Access Memory(DARAM) reduces the memory bandwidth limit. Test results show that program run time is reduced by up to 48% using proper memory allocation.The memory assignment method is also easy to implement.

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Available abstract

A memory allocation algorithm was developed to maximize parallel data access and make full use of CPU processing ability to improve real-time performance of embedded multimedia applications.A scratch-pad memory is assigned to meet the data processing demand with data dynamically transferred to on-chip memory by Direct Memory Access(DMA) to reduce the delays in slow off-chip memory access.Parallel access to multiple memory banks by several data buses and dual access through dual Access Random Access Memory(DARAM) reduces the memory bandwidth limit. Test results show that program run time is reduced by up to 48% using proper memory allocation.The memory assignment method is also easy to implement.

Key concepts: Interleaved memory, Computer science, Registered memory, Flat memory model, Uniform memory access, Semiconductor memory, Memory map, Computer memory

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