HBD using cascode-Voltage switch logic gates for SET tolerant digital designs

Cascode-voltage-switch logic family of gates is evaluated for single-event vulnerability. As the data is stored on two storage nodes for each logic gate in this logic family, as opposed to only one for static logic family, the single-event transient pulse does not propagate for more than a few stages. Simulation results show single-event transient pulse termination after one logic gate. Area, speed, and power requirements for cascode-voltage logic are comparable to that of static logic.